Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Submit feedback
Sign in
Toggle navigation
R
renew-software
Project
Project
Details
Activity
Releases
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
renew
renew-software
Commits
3297a977
Commit
3297a977
authored
Sep 25, 2019
by
Oscar Bejarano
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Add AGC init to sounder
parent
b2b70d11
Changes
3
Hide whitespace changes
Inline
Side-by-side
Showing
3 changed files
with
50 additions
and
0 deletions
+50
-0
macros.h
CC/Sounder/include/macros.h
+20
-0
sdr-lib.h
CC/Sounder/include/sdr-lib.h
+1
-0
sdr-lib.cc
CC/Sounder/sdr-lib.cc
+29
-0
No files found.
CC/Sounder/include/macros.h
View file @
3297a977
...
...
@@ -31,4 +31,24 @@
#define FPGA_IRIS30_INCR_TIME (1 << 2)
#define FPGA_IRIS30_DECR_TIME (1 << 3)
// AGC and Packet Detect
#define FPGA_IRIS030_WR_AGC_ENABLE_FLAG 232
#define FPGA_IRIS030_WR_AGC_RESET_FLAG 236
#define FPGA_IRIS030_WR_IQ_THRESH 240
#define FPGA_IRIS030_WR_NUM_SAMPS_SAT 244
#define FPGA_IRIS030_WR_MAX_NUM_SAMPS_AGC 248
#define FPGA_IRIS030_WR_RSSI_TARGET 252
#define FPGA_IRIS030_WR_WAIT_COUNT_THRESH 256
#define FPGA_IRIS030_WR_AGC_SMALL_JUMP 260
#define FPGA_IRIS030_WR_AGC_BIG_JUMP 264
// RSSI register Set
#define FPGA_IRIS030_RD_MEASURED_RSSI 284
// Packet Detect Register Set
#define FPGA_IRIS030_WR_PKT_DET_THRESH 288
#define FPGA_IRIS030_WR_PKT_DET_NUM_SAMPS 292
#define FPGA_IRIS030_WR_PKT_DET_ENABLE 296
#define FPGA_IRIS030_WR_PKT_DET_NEW_FRAME 300
#endif
CC/Sounder/include/sdr-lib.h
View file @
3297a977
...
...
@@ -31,6 +31,7 @@ public:
void
radioRx
(
void
*
const
*
buffs
);
int
radioTx
(
size_t
,
const
void
*
const
*
buffs
,
int
flags
,
long
long
&
frameTime
);
int
radioRx
(
size_t
,
void
*
const
*
buffs
,
long
long
&
frameTime
);
void
initAGC
(
SoapySDR
::
Device
*
iclSdrs
);
void
sync_delays
(
int
cellIdx
);
~
RadioConfig
();
...
...
CC/Sounder/sdr-lib.cc
View file @
3297a977
...
...
@@ -168,6 +168,10 @@ RadioConfig::RadioConfig(Config* cfg)
reset_DATA_clk_domain
(
dev
);
radios
[
i
].
rxs
=
dev
->
setupStream
(
SOAPY_SDR_RX
,
SOAPY_SDR_CF32
,
channels
);
radios
[
i
].
txs
=
dev
->
setupStream
(
SOAPY_SDR_TX
,
SOAPY_SDR_CF32
,
channels
);
if
(
_cfg
->
clAgcEn
){
RadioConfig
::
initAGC
(
device
);
}
}
}
std
::
cout
<<
"radio init done!"
<<
std
::
endl
;
...
...
@@ -762,6 +766,31 @@ void RadioConfig::collectCSI(bool& adjust)
}
}
void
RadioConfig
::
initAGC
(
SoapySDR
::
Device
*
iclSdr
)
{
/*
* Initialize AGC parameters
*/
// AGC Core
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_AGC_ENABLE_FLAG
,
0
);
// Enable AGC Flag (set to 0 initially)
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_AGC_RESET_FLAG
,
1
);
// Reset AGC Flag
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_IQ_THRESH
,
1000
);
// Saturation Threshold: 10300 about -6dBm
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_NUM_SAMPS_SAT
,
3
);
// Number of samples needed to claim sat.
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_MAX_NUM_SAMPS_AGC
,
100
);
// Threshold at which AGC stops
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_WAIT_COUNT_THRESH
,
20
);
// Gain settle takes about 20 samps(value=20)
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_AGC_BIG_JUMP
,
30
);
// Drop gain at initial saturation detection
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_AGC_SMALL_JUMP
,
2
);
// Drop gain at subsequent sat. detections
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_RSSI_TARGET
,
20
);
// RSSI Target for AGC: ideally around 14 (3.6GHz) or 27 (2.5GHz)
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_AGC_RESET_FLAG
,
0
);
// Clear AGC reset flag
// Packet Detect Core
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_PKT_DET_THRESH
,
0
);
// RSSI value at which Pkt is detected
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_PKT_DET_NUM_SAMPS
,
5
);
// Number of samples needed to detect frame
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_PKT_DET_ENABLE
,
0
);
// Enable packet detection flag
iclSdr
->
writeRegister
(
"IRIS30"
,
FPGA_IRIS030_WR_PKT_DET_NEW_FRAME
,
0
);
// Finished last frame? (set to 0 initially)
}
void
RadioConfig
::
drain_buffers
(
SoapySDR
::
Device
*
ibsSdrs
,
SoapySDR
::
Stream
*
istream
,
std
::
vector
<
void
*>
buffs
,
int
symSamp
)
{
/*
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment